Layout Engineer
Layout Engineer
smartsoc solutions pvt ltd3-8 Years
- Posted 12 hours ago
- Be among the first 10 applicants
Job Description
Strong experience in Memory Layout / Custom Layout
• Hands-on experience with Cadence Virtuoso
• Good knowledge of DRC / LVS / ERC
• Experience in Full-Custom Layout
• Exposure to SRAM / ROM / Memory IP Layout
• Understanding of advanced semiconductor technologies is an added advantage
Experience :3-8 years
Notice period :0- 30 days
Location : Bangalore
interested candidate please share the updated resume in this mail is [Confidential Information]
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Key Skills
About Company
Skills:
shielding , matching , Parasitics, PEX, Analog circuit basics, Layout techniques, LVS, EM IR, Layout-dependent effects, Deep-submicron CMOS technologies, Analog Mixed-Signal IC Layout, DRC, Analog Custom Layout, Cadence Virtuoso
Skills:
VXL, TSMC 16nm 5nm 3nm, EM, LVS, Dfm, Analog Mixed-Signal Custom Layout, VLE, DRC, Intel Samsung GF, Antenna, IR verification flows, Cadence Virtuoso, Mentor Graphics Calibre DRC
Skills:
caliber , Verification Tools, Layout Design, Cadence Virtuoso
Skills:
Shell, PERL, Tcl, Assura, Skill, Memory layout design, Cadence Virtuoso
Skills:
scripting expertise, Cadence LVS, Calibre physical verification flow, layout XL, EXL, Cadence Virtuoso, layout design and verification tools, GXL