Analog Layout Engineer
Analog Layout Engineer
lancesoft, inc.3-5 Years
- Posted 10 hours ago
- Be among the first 10 applicants
Job Description
We are looking for an experienced Analog Layout Engineer with strong expertise in custom IC layout and physical implementation of analog/mixed-signal circuits.
Location: Bangalore
Experience: 3+ Years
Key Responsibilities
- Develop high-quality analog/custom layouts for IC designs.
- Perform floorplanning, placement, routing, matching, shielding, and DRC/LVS verification.
- Work closely with circuit designers to achieve performance, area, and reliability targets.
- Handle parasitic extraction and layout optimization.
- Debug and resolve DRC, LVS, and layout-related issues.
- Support tape-out activities and design reviews.
Must-Have Skills
- 3+ years of experience in Analog/Custom Layout.
- Strong knowledge of Analog & Mixed-Signal IC Layout.
- Hands-on experience with Cadence Virtuoso.
- Good understanding of DRC, LVS, PEX, matching, shielding, and EM/IR.
- Experience with deep-submicron CMOS technologies.
- Good knowledge of layout-dependent effects and parasitics.
- Strong understanding of analog circuit basics and layout techniques.
More Info
Key Skills
Parasitics
PEX
Analog circuit basics
Layout techniques
EM IR
Layout-dependent effects
Deep-submicron CMOS technologies
Analog Mixed-Signal IC Layout
DRC
Analog Custom Layout
About Company
Skills:
TSMC 7nm, IR drop, Analog RF layout techniques, ESD verification, LOD, FinFET nodes, circuit design analysis, WPE, Latch-up, Analog Layout, ERC checks, TSMC 16nm, Esd, EM issues, high-complexity RF designs, Custom RF, Samsung 8nm
Skills:
guard rings, PEX, Reliability, dummy structures, symmetry shielding, LVS, advanced-node custom layout, matching performance, ERC, DRC, matching-critical layouts, common-centroid interdigitation, Cadence Virtuoso, 2nm 3nm 5nm FinFET
Skills:
post-layout simulation, analog circuit theory, DRC, Mentor Graphics, analog and mixed-signal AMS design, LVS, Synopsys, Cadence Virtuoso, Analog Layout, semiconductor device physics
Skills:
Analog Layout, Design for manufacturability and testing requirements, Analog circuit design principles, Parasitic extraction and mitigation techniques
Skills:
matching , Electromigration (EM), Routing, Shielding coupling crosstalk, DC-DC Converter Layout Development, Floorplan optimization, Cadence Virtuoso Editor, IR-drop, Active passive parasitic devices, Analog Layout Design, ESD Latch-up, Calibre, Mixed-Signal Layout Design, BCD Technology, Effort area estimation, Physical verification sign-off, DRC, Layout checks, Analog Layout fundamentals, LVS