Principal Design Engineer

Responsibilities:

• Define and develop digital architecture with clear understanding of trade-offs across power, performance, and area (PPA).
• Drive architecture-to-microarchitecture conversion and implement RTL designs in SystemVerilog/HDL.
• Work on synthesis, constraint (SDC) generation, timing analysis, and power management strategies.
• Implement low-power design techniques including power islands, isolation, and state retention.
• Contribute to DFT strategies and ensure design quality through proper testability considerations.
• Support embedded microcontroller (uC-based) subsystem design and integration.
• Work closely with verification teams to define coverage points, test strategies, corner cases, and stimulus generation.
• Debug verification failures and SystemVerilog Assertions (SVA) related issues.
• Execute automation scripts for design flows and quality checks.
• Support compliance with serial interface standards such as PCIe, USB, Ethernet, etc.

Collaboration & Cross-Functional Work:

• Coordinate with mixed-signal, analog, and verification teams for complete IP development lifecycle.
• Engage with globally distributed engineering teams to ensure design consistency and delivery.
• Participate in design reviews, requirement discussions, and technical planning sessions.