Physical Design Engineer

Company Description

NIT DATA is a global IT consulting and technology services firm known for its expertise in delivering tailored solutions for enterprises of all sizes. As an SAP Global Partner, SOC 2 Type II certified, and ISO 27001 compliant organization, NIT DATA ensures secure, efficient, and scalable services. By leveraging modular PODs, the company integrates seamlessly with client ecosystems to enable agile execution across platforms like SAP, Salesforce, ServiceNow, Cloud, and AI. With decades of consulting experience, NIT DATA combines domain expertise, innovation, and skilled talent to address business-critical needs and deliver strategic value and competitive advantage.

The team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group. Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities.

Requirements

5-8 years of hands-on physical design implementation experience along with APR flow development and PPA analysis

STA closure at block

Experience in Advanced process technology nodes (6/7 nm preferred)

Experience with Cadence layout tools (Innovus, Tempus, etc..)

Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool

Experience in closing all the IR issues within the block based on feedback

Should be strong in fundamentals of digital electronics and microprocessors

Should have very good analytical skills

Required soft skills English language proficiency, Good collaboration and interpersonal skills. Good analytical and Problem-solving skills along with strong ownership, commitment and time management.

Bachelor's or Masters with a relevant education is in the field of electronics and computer architecture

Preferred Skills:

Strong verbal communication skills

Cadence PnR tools

Formal verification experience