Role : Physical Design (PD) Engineer - 5+ Years Experience | Bangalore
We are looking for an experienced Physical Design Engineer with a strong understanding of the complete backend VLSI flow. The ideal candidate should be capable of independent planning and execution of all physical design stages.
Key Responsibilities
- End-to-end ownership of physical design flow including floorplanning, placement, clock tree synthesis (CTS), routing, and extraction
- Perform timing closure across all modes and corners
- Handle IR drop, electromigration (EM), power integrity, and signal integrity analysis
- Execute physical verification including signoff DRC and LVS closure
- Address DFM considerations and ensure signoff-quality tapeout
- Work independently to resolve complex design and timing challenges
Required Skills & Experience
- 5+ years of hands-on experience in Physical Design
- Deep understanding of :
- Synthesis-to-signoff physical design flow
- Place & Route, CTS, Clock Distribution
- Timing convergence and closure techniques
- IR/EM analysis and power integrity checks
- Signoff DRC/LVS
- Strong experience with Cadence Innovus (mandatory)
- Proven ability to execute full-chip or block-level PD independently
Location : Bangalore
(ref:hirist.tech)
