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FPGA Design Engineer
Raddef Private Limited

FPGA Design Engineer

Raddef Private Limited
4-10 Years
₹ 5 - 30.5 LPA
Early Applicant
Quick Apply
  • Posted 9 hours ago
  • Be among the first 10 applicants

Job Description

  • Design and develop FPGA-based solutions using Verilog and VHDL.
  • Develop and implement FPGA design constraints using SDC/XDC for synthesis, implementation, and timing closure.
  • Implement and optimize DSP algorithms and processing blocks, including FFT, Pulse Compression, Waveform Generation, and related signal processing functions.
  • Develop high-speed data acquisition and real-time signal processing pipelines.
  • Work with Xilinx Vivado for synthesis, implementation, timing closure, and debugging.
  • Design and integrate AXI-based architectures and interconnects, including AXI4, AXI-Stream, and AXI-Lite.
  • Interface FPGA with external memories including DDR3, DDR4, and DDR5.
  • Implement and validate communication and high-speed interface protocols, including Ethernet MAC (1GbE/10GbE) and other peripheral interfaces..
  • Handle Clock Domain Crossing (CDC) and timing-related challenges to ensure robust FPGA operation.
  • Configure and manage PLL/Clocking resources.
  • Perform functional simulation, timing analysis.
  • Collaborate with hardware, embedded, and signal processing teams for system integration hardware bring-up, and debugging.
  • Use hardware debugging tools such as ILA, VIO for FPGA validation and troubleshooting.

Prepare design documentation, test reports, and support production/debug 

Spotlight

  • Cafeteria, Gifts on festivals, Maternity leaves, Paternity leaves, Retirement benefits, Health &amp; insurance, Health insurance

Bachelor Of Technology (B.Tech/B.E)

Key Skills

Vhdl
Xilinx
Sta

DSP & Signal Processing Algoriths

Matlab Simulink
Fpga
Verilog
Last Updated: 21-10-2026 10:57:18 AM

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