All aspects of FPGA design activity: Coding, Synthesizing, mapping and timing closure, verification support and LAB bring up. Participate in FPGA architecture and design for current and next generation products, collaborate with other teams: SW, DV, QA, System etc
Job Requirements
B.E/B Tech degree in Electronic & Communication or Equivalent
5+ years experience as an FPGA designer
5+ years experience with networking.
Practical knowledge of RTL design, synthesis, timing closure, simulation and verification test benches.
Hardware bring up and debug experience.
Familiarity with high level programming languages like C/C++, System Verilog, Scripts (TCL, Python) advantage
Excellent system understanding & strong analytical and problem solver abilities.
