test equipment , Usb, Pcie, Perl, Python, Tcl, HW testing, traffic analysers, high speed FPGA Design, FPGA Verilog design, high speed Ethernet, Xilinx FPGA technology and tools, test generators, debugging skills

Verilog, static timing analysis, Modelsim, Questa, Intel Quartus, synchronous design principles, Xilinx Vivado, RTL design methodologies, DO-254 design assurance process, Microsemi Libero, FPGA design flows, VHDL, Synthesis, timing closure techniques, FPGA design and development

Jtag, Fpga, Xilinx, Simulation, RTL

Vcs, Pcie, Verilog, Debugging, Python, Scripting, Bash, Digital Logic Design, FPGA Design, Ethernet, Tcl, high-speed interfaces, Xcelium, Simulation Tools, FPGA synthesis, LPDDR4, Altera Quartus Prime Pro, LPDDR5, systemverilog, Axi, Timing Closure, Questa, CXL, DDR5, DDR4

VHDL programming, Xilinx, FPGA development, hardware debugging, Intel Altera, Timing Closure, RFSoC, Vivado, Modelsim, LabVIEW FPGA, Rtl Design, Simulation

Pcie, Verilog, JESD204B, Isp, SERDES, Intel Quartus, systemverilog, Xilinx Vivado, Synthesis, VHDL, FFT, Video Processing Pipelines, MIPI Interfaces, CORDIC Algorithms, FIR Filters