DFT Engineer
DFT Engineer
ALTEN Calsoft Labs4-6 Years
- Posted 6 days ago
- Be among the first 10 applicants
Job Description
Senior DFT Engineer
Experience : 4+ years
Location : Bangalore
Experience to join our Silicon Engineering team. In this role, you will lead end-to-end DFT strategies—including Scan compression, MBIST, IJTAG, and ATPG pattern generation—for high-performance, sub-10nm SoCs. Candidates must have expertise in top-tier EDA tools (Tessent, Synopsys, or Cadence) and a notice period of 0–30 days.
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About Company
Skills:
Shell Scripting, Perl, Python, Tcl, Design Compiler, Verdi, ATPG Pattern Generation, RTL Netlist, primetime, JTAG Boundary Scan, Tessent Scan, Fault Coverage Analysis, Synopsys DFTMAX, Tessent ATPG, Tessent MBIST, Test Collateral, Siemens Tessent Tool Suite, Tessent Diagnosis, Scan Insertion, Scan Compression, MBIST Architecture Implementation
Skills:
Jtag, Shell, Python, Tcl, scan compression, IEEE 1149.x, automation infrastructure, automation and scripting, MBIST, DFT implementation methodology, IEEE 1687, DFT EDA tools, ATPG, Cad Methodology, hierarchical DFT methodologies, LBIST
Skills:
boundary scan , Jtag, Perl, Shell scripting, Python, Tcl, Scan Insertion, MBIST, SMS and SEQ insertion, Multi-clock DFT architectures, Scan compression, Test clocks, Transition fault pattern generation, ATPG, Resets, DFT DRC debugging, Synopsys DFT tools, Coverage closure
Skills:
scan compression, DFT architecture, ATPG, Scan Insertion, MBIST, Cadence DFT tools, test coverage analysis
Skills:
synopsys tools , MBIST Insertion Verification, ATPG Coverage Analysis Debug, Scan Insertion Compression, Boundary Scan Verification