DFT Engineer
DFT Engineer
Cyient4-6 Years
- Posted 9 hours ago
- Be among the first 10 applicants
Job Description
- 4-6 years of hands-on experience in DFT implementation.
- Strong expertise in Siemens Tessent Tool Suite:
- Tessent Scan
- Tessent ATPG
- Tessent MBIST
- Tessent Diagnosis
- Experience with:
- Scan Insertion & Scan Compression
- ATPG Pattern Generation
- MBIST Architecture & Implementation
- JTAG / Boundary Scan
- Fault Coverage Analysis
- Good understanding of digital design fundamentals.
- Strong debugging and scripting skills using:
- TCL
- Perl/Python
- Shell Scripting
- Experience working with RTL, Netlist, and Test Collateral.
Preferred Skills
- Exposure to advanced nodes such as 16nm/7nm/5nm technologies.
- Knowledge of Low Power DFT methodologies.
- Understanding of LBIST and advanced test techniques.
- Familiarity with:
- Synopsys DFTMAX
- Design Compiler
- PrimeTime
- Verdi
- Experience with SoC-level DFT integration and test planning.
Educational Qualification
B.E./B.Tech/M.E./M.Tech in Electronics, VLSI, Electrical, ECE, or related disciplines
More Info
Key Skills
Verdi
ATPG Pattern Generation
RTL Netlist
JTAG Boundary Scan
Tessent Scan
Fault Coverage Analysis
Synopsys DFTMAX
Tessent ATPG
Tessent MBIST
Test Collateral
Siemens Tessent Tool Suite
Tessent Diagnosis
Scan Compression
MBIST Architecture Implementation
About Company
Skills:
Jtag, Shell, Python, Tcl, scan compression, IEEE 1149.x, automation infrastructure, automation and scripting, MBIST, DFT implementation methodology, IEEE 1687, DFT EDA tools, ATPG, Cad Methodology, hierarchical DFT methodologies, LBIST
Skills:
boundary scan , Jtag, Perl, Shell scripting, Python, Tcl, Scan Insertion, MBIST, SMS and SEQ insertion, Multi-clock DFT architectures, Scan compression, Test clocks, Transition fault pattern generation, ATPG, Resets, DFT DRC debugging, Synopsys DFT tools, Coverage closure
Skills:
scan compression, DFT architecture, ATPG, Scan Insertion, MBIST, Cadence DFT tools, test coverage analysis
Skills:
synopsys tools , MBIST Insertion Verification, ATPG Coverage Analysis Debug, Scan Insertion Compression, Boundary Scan Verification
Skills:
boundary scan , Perl, Tcl, test compression, scan compression, DFT signoff, pattern optimization, test access strategies, MBIST, DFT architecture definition, ATPG, yield ramp, LBIST, first silicon bring-up