An experienced and passionate Applications Engineer, ready to join our dynamic team.
You thrive in fast-paced environments and are driven by the opportunity to work with high-end customers in the Mobile Industry Processor Interface (MIPI ) domain.
With your strong technical background in ASIC design, you are adept at providing top-tier technical support and guidance.
Your excellent communication skills enable you to effectively interact with customers and internal teams alike.
You are not just looking for a job, but a place where you can make a significant impact and grow your career.
What You ll Be Doing:
- Providing technical support to field engineers and customers utilizing Synopsys MIPI UFS Intellectual Property (IP)
- Partnering with high-tech customers through the full cycle of ASIC design, from installation and training to RTL design and production testing
- Conducting reviews on customers major SoC design milestones
- Authoring application notes and white papers to promote the IPs ease of use and address specific challenges
- Providing feedback to internal teams for continuous product improvements based on customer feedback
- Ensuring successful integration of Synopsys MIPI IP solutions into customers SoCs
The Impact You Will Have:
- Enhancing customer satisfaction by providing expert support and ensuring seamless integration of Synopsys IP
- Driving innovation by collaborating with customers on cutting-edge SoC designs
- Contributing to the development of industry-leading IP solutions through continuous feedback and improvement processes
- Expanding Synopsys market presence in the MIPI domain through successful customer engagements
- Promoting the adoption of Synopsys IP by authoring impactful documentation and white papers
- Supporting the growth of Synopsys IP portfolio by identifying and addressing customer needs
What You ll Need:
- Bachelors degree with 5+ years or Masters degree with 2+ years of relevant experience in the ASIC design process
- Proficiency in Verilog HDL, synthesis, simulation, and verification
- Knowledge of Place and Route, Design Reuse, Physical Design, or Analog Design is a plus
- Familiarity with MIPI UFS/UniPro protocols, high-speed SERDES, or parallel interfaces is advantageous
- Experience with Synopsys tool suites is a plus
- Strong verbal and written communication skills in English
