Analog Layout Engineer

We are seeking a highly skilled and collaborative Analog Layout Engineer to join our team. The ideal candidate will have extensive experience in analog layout in advanced CMOS technologies and be proficient with industry-standard tools. This role requires strong problem-solving abilities, excellent communication skills, and the capacity to work closely with circuit designers to meet stringent design specifications.

Roles and Responsibilities:

• Perform layout in advanced CMOS technologies, including floor planning, placement, routing, DRC (Design Rule Checking), LVS (Layout Versus Schematic), and other related tasks.
• Demonstrate experience working on various technology nodes such as 22nm, 28nm, 45nm, 65nm, etc.
• Possess expertise in laying out various analog mixed-signal blocks including, but not limited to, PLL (Phase-Locked Loop), Bandgap references, ADC (Analog-to-Digital Converter), DAC (Digital-to-Analog Converter), SERDES (Serializer/Deserializer), and I/O (Input/Output) blocks.
• Be well-versed with industry-standard tools such as Virtuoso L/XL/GXL, IC12.1, and Calibre.
• Exposure to automated place and route tools such as ICC (Innovus/Encounter Digital Implementation System), SOC Encounter, etc., would be an added advantage.
• Required to work closely with circuit designers to understand design requirements and meet all specifications.
• Exhibit excellent teamwork, good communication, and strong problem-solving skills.
• Demonstrate the ability to collaborate with others across groups in a direct and productive manner, maintaining unquestionable integrity.
• Possess strong analytical ability to identify and resolve complex layout challenges.

Qualification:

• B.E/B.Tech or M.E/M.Tech/M.S in Electrical or Electronics engineering.