scoreboard , System Verilog, verification environment, verification closure, script development, interface agents, Uvm, testbench components

DDR, Pcie, Uart, I2c, Axi, IP verification, FPGA-based verification, APB, Uvm, C-based tests, systemverilog

C, Python, AI-assisted development tools, emulation or FPGA-based verification, Uvm, systemverilog

Fpga, Perl, Python, RTL, Uvm, systemverilog, AMBA bus protocols, Baremetal processor environments, low power verification methods, object-oriented design, formal verification methods, transaction level modeling, test plan development, emulation platforms

Test Planning, Debugging, Automation, Scripting, Validation

Usb, DDR, Shell, Perl, Pcie, Ethernet, Python, IP SoC verification, UVM methodology, systemverilog, MIPI CSI RX TX DSI, assertions SVA

Test Plan Creation, Debugging, Python, Perl, VIP integration, testbench architecture, Uvm, verification methodologies, scoreboarding, systemverilog, coverage-driven verification, execution and review, assertions, regression management, debug flows, functional coverage

Fpga, Perl, Python, RTL, Uvm, systemverilog, AMBA bus protocols, Baremetal processor environments, low power verification methods, object-oriented design, formal verification methods, transaction level modeling, emulation platforms, test plan development