Search by job, company or skills

Tessolve

Senior Design Verification Engineer

This job is no longer accepting applications

new job description bg glownew job description bg glow
  • Posted a month ago

Job Description

Job Title: IP / SoC Verification Engineer (High-Speed Protocols)

Company: Tessolve Semiconductor

Experience: 5 – 15 Years

Notice Period: 0 – 30 Days

Location: Bengaluru / Hyderabad/Noida

Job Description:

We are looking for experienced IP / SoC Verification Engineers with strong expertise in high-speed interface protocols to join our growing team.

Key Responsibilities:

  • Develop and execute verification plans for IP and SoC-level designs
  • Build and maintain UVM/SystemVerilog-based verification environments
  • Develop testbenches, sequences, and checkers
  • Perform functional, code, and assertion coverage analysis
  • Debug and root-cause design and verification issues
  • Collaborate closely with design, architecture, and validation teams
  • Drive verification closure and ensure high-quality deliverables

Required Skills:

  • Strong experience in SystemVerilog and UVM methodology
  • Hands-on experience in IP/SoC verification
  • Expertise in one or more high-speed protocols such as:
  • PCIe
  • USB
  • Ethernet
  • DDR
  • MIPI (CSI RX/TX, DSI)
  • Experience in writing assertions (SVA)
  • Familiarity with scripting (Python/Shell/Perl)
  • Strong debugging and problem-solving skills

Preferred Skills:

  • Experience with emulation platforms or FPGA prototyping
  • Knowledge of low-power verification (UPF/CPF)
  • Exposure to formal verification is a plus

Education:

  • Bachelor's or Master's degree in Electronics / Electrical / VLSI / related field

Why Join Tessolve Semiconductor

  • Opportunity to work on cutting-edge semiconductor technologies
  • Exposure to global clients and complex SoC programs
  • Strong learning and growth environment

More Info

Job Type:
Function:
Employment Type:

About Company

Job ID: 145403845

Similar Jobs

Bengaluru, India

Skills:

VcsGitPcieEthernetSystem Veriloglow-power verification techniquescdcUvmUPFC LanguageAxilevel shifter implementationAMBAFIFOsAPBQuestaRISC-V CPU subsystemsclock reset architecturespower management strategiesAHB

Bengaluru, India

Skills:

UsbDDRShellPerlEthernetPythonEmulationUVM methodologyhigh-speed interfaces PCIesystemverilogscoreboardsindustry-standard simulators and toolsformal verificationASIC SoC architecturefunctional coverage assertionsdebugging skillslow-power verification UPFSVA

Bengaluru, India

Skills:

UnixMakefileShellConfiguration ManagementPERLSystem VerilogPythonVerification dashboarding toolsARM CPUPCI ExpressUvmAMBA bus protocolsEthernet bus protocols

Bengaluru, India

Skills:

Verilogadvanced stimulus generation techniquesUvmcoverage-driven verificationsystemverilog

Bengaluru, India

Skills:

DDRPcieUartI2cAxiIP verificationFPGA-based verificationAPBUvmC-based testssystemverilog