Job Description

FPGA / RTL Design Engineer

Role Overview

We are looking for an experienced FPGA/RTL Design Engineer to design, develop, and validate FPGA-based digital systems. The ideal candidate will have strong expertise in RTL design, FPGA implementation, timing closure, and high-speed interface integration, along with hands-on experience in simulation, debugging, and optimization.

Key Responsibilities

Develop and implement RTL designs using Verilog, VHDL, or SystemVerilog.
Design and integrate FPGA-based solutions, IP blocks, and system-level components.
Perform functional simulation, verification, and debugging of FPGA designs.
Execute synthesis, static timing analysis (STA), and timing closure activities.
Troubleshoot and resolve design, performance, and integration issues.
Collaborate with cross-functional teams to deliver optimized and scalable FPGA solutions.
Support customer engagements and contribute to technical collateral and reusable assets.

Required Qualifications

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
5+ years of experience in FPGA design, RTL development, or FPGA applications engineering.
Strong expertise in Verilog, VHDL, and/or SystemVerilog.
Hands-on experience with FPGA toolchains such as Xilinx Vivado and/or Intel Quartus.
Experience with third-party simulation and verification tools.
Strong debugging skills with FPGA development boards and lab validation.

Technical Skills

FPGA & RTL Design