System-on-Chip Design Engineer

SoC Design Engineer

Location: Bengaluru

Experience: 6+ Years

Role Overview

We are looking for a SoC Design Engineer with 6+ years of hands-on experience in SoC design, NoC, microarchitecture, RTL development, and RTL quality/signoff. The role involves working across the SoC design lifecycle, from microarchitecture definition and RTL implementation through integration and design-quality closure.

Key Responsibilities

• Develop and integrate synthesizable RTL for complex SoC designs.
• Work on NoC-based SoC architectures, interconnect, and subsystem integration.
• Translate microarchitecture specifications into robust Verilog/SystemVerilog RTL.
• Drive RTL quality through Lint, CDC, and structural checks.
• Analyze and debug SpyGlass Lint/CDC violations and drive closure.
• Work closely with Architecture, Design Verification, Physical Design, and SoC Integration teams.
• Participate in microarchitecture and RTL design reviews.
• Debug complex RTL and integration issues across IP/subsystem boundaries.
• Ensure design quality across functionality, performance, power, and area (PPA) requirements.
• Support synthesis, verification, timing, and downstream implementation activities.

Core Technical Requirements

• 6+ years of experience in SoC Design / RTL Design.
• Strong hands-on expertise in Verilog/SystemVerilog.
• Strong understanding of SoC microarchitecture and NoC concepts.
• Experience with RTL Lint, CDC, RDC, and structural analysis.
• Hands-on experience with SpyGlass Lint/CDC or equivalent tools.
• Strong understanding of clock-domain crossing, reset-domain crossing, synchronization, and metastability.
• Experience with RTL integration, debugging, synthesis, and design-quality closure.
• Good scripting skills in Python/Tcl/Perl are desirable.
• Experience with complex ASIC/SoC development flows preferred.