Verilog, LINT, SDC constraints, cdc, UPF, systemverilog, Rtl Design, RDC, VCLP, Synthesis, SoC integration, Makefile-based flows, Low-power design concepts, Scripting in Tcl

Vcs, Perl scripting, Verilog, Python, Tcl, LINT, cdc, high-speed interfaces, ARM-based SoC architecture, Xcelium, AMBA protocols, systemverilog, RDC, Synopsys Design Compiler, Questa