STA Engineer
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Working knowledge of Synthesis, DFT, STA, Lint & CDC• Work closely with design teams to understand the requirements and constraints of the design.• Write and implement block level and top-level constraints for synthesis and STA.• Experience of performing STA preferably with both Tempus and Primetime• STA and Timing closure using MMMC in both functional and DFT modes• Experience on SDF generation and validation and support to functional verification team during GLS.• ETM /timing model generation and validation at IP level.• Working in partnership with SoC teams to support the IP at SoC level.
HighPoints Technologies India Private Limited
Job ID: 153907523
Skills:
Clp, Automation, SDC constraints development, Synthesis, Timing Closure, LINT, LEC, AI scripting, Prelayout STA, cdc, Postlayout STA, RTL Netlist based static checks, SDC generation
Skills:
Clp, Automation, LINT, cdc, Prelayout STA, SDC generation, AI scripting, SDC development, LEC, Low power aspects, RTL Netlist based static checks, Fisthail, Timing Closure, Synthesis, Excellicon, Postlayout STA, Timing Constraints, TCM
Skills:
Timing ECO generation, Block and SoC level timing convergence, low power design, Block and SoC level equivalence check, Block and SoC level Synthesis, Sta
Skills:
STA Engineer, constraint development
Skills:
Sta, GLS, post-layout STA, Synthesis, SDF generation, LINT, LEC, cdc, primetime, Tempus, MMMC analysis, ETM timing model validation, Timing Closure, SDC constraints development, Dft
