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SRAM Mask Layout Designer

5-10 Years
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Job Description

General Summary

Qualcomm is a company of inventors revolutionizing the CPU market in an age of innovation. As an SRAM Mask Layout Designer, you will be part of a high-performance CPU team, collaborating with top engineering talent to deliver designs that push the limits of performance, energy efficiency, and scalability. This role offers a dynamic and creative environment, with opportunities to impact next-generation products used around the world.

In this role, you will develop block or macro-level layouts and floorplans for high-performance custom memories, ensuring alignment with design schematics and project requirements. You will apply industry best practices, work with cutting-edge technologies, and contribute to building world-class silicon products.


Minimum Qualifications

  • Education & Experience:
  • High school diploma or equivalent and 5+ years of relevant experience
  • OR Bachelor's degree in Electrical Engineering or related field and 5+ years of relevant experience
  • OR Master's degree in Electrical Engineering or related field and 3+ years of relevant experience
  • Technical Expertise:
  • Hands-on experience with custom SRAM layout
  • Familiarity with industry-standard custom design tools and flows
  • Experience with deep sub-micron technologies (e.g., FinFET/nanosheet processes at 5nm or below)
  • Proficiency in layout design of library cells, datapaths, and memories
  • Knowledge of Cadence Virtuoso and Calibre LVS/DRC tools
  • Understanding of layout floorplanning and hierarchical assembly


Preferred Qualifications

  • Understanding of device parasitics and reliability considerations in layout
  • Familiarity with critical circuit layout styles
  • Ability to write SKILL code for layout automation
  • Knowledge of EMIR improvements in layout
  • Strong communication skills to collaborate effectively across teams


Roles and Responsibilities

  • Design layout for custom memories and digital circuits based on schematics
  • Interpret and apply design rule manuals for optimal layout compliance
  • Manage the complete layout process, from floorplanning to physical verification
  • Use verification tools to run LVS, DRC, ERC, and analyze results
  • Execute layout fixes based on feedback from verification tools and circuit designers
  • Work independently and deliver layout tasks with minimal supervision
  • Provide realistic schedules and ensure timely completion of layout projects
  • Contribute to strategic decisions and optimization related to memory layout

More Info

Job Type:
Employment Type:
Open to candidates from:
Indian

About Company

QUALCOMM CDMA Technologies (QCT) is the largest provider of 3G chipset and software technology in the world, with chipsets shipped to more than 50 customers and powering the majority of all 3G devices commercially available. QCT partners with nearly 60 3G network operators around the globe and has the largest CDMA engineering team in the wireless industry.
QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer device manufacturers reduced bill-of-materials costs, time-to-market, and development time. Mobile handsets powered by QCT chipsets can offer more features while maintaining a smaller, sleeker form-factor and benefiting from reduced power demands.
QCT values collaboration with its customers and partners and works closely with them to enable their success. We offer a wide range of tools to support the device development process, and develop new technologies based on the needs and demands of the wireless market. Devices for all market segments can now include features enabled by 3G wireless technology, in demand by a growing and increasingly sophisticated wireless community.

Job ID: 115066665

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