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Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.
Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what's next in electronics and the world.
Job DescriptionWe are seeking a highly experienced Senior Staff RTL Design Engineer to join our SoC development team. This role involves RTL design for chiplet based power efficient chips and collaborating across architecture, verification, and physical design teams to deliver world-class semiconductor solutions.
Job Summary
Qualifications
Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier. As the industry's leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power.
With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, To Make Our Lives Easier.
At Renesas, you can:
Are you ready to own your success and make your mark
Join Renesas. Let's Shape the Future together.
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in-office days are Tuesday through Thursday for innovation, collaboration and continuous learning.
Job ID: 147260249

Skills:
C Programming, Python, Security practices in firmware software development, Linux auxiliary bus driver model, Out-of-band device management, NVMe host or target driver development, RDMA RoCE, DRAM architecture, Linux kernel module development, Multi-function PCIe device architectures, GPU host-side driver development, PCIe protocol expertise, MCTP OpenBMC stacks, CXL Compute Express Link, ARM SoC architecture
Skills:
LINT, Sta, Synchronous design concepts, Memory operation, power analysis, SoC design flows, CMOS Circuit Design, Rtl Design, Synthesis, spyglass, device physics, CDC methodologies
Skills:
Shell, Tcl, Perl, DMA, digital design fundamentals, control data path logic, protocol bridges, low-power design flows, systemverilog, power performance and area optimization techniques, lint CDC RDC synthesis STA constraints, RTL design using Verilog, memory-mapped peripherals, micro-architecture definition, Dft, bus fabrics, debugging skills for simulation synthesis and integration issues
Skills:
performance verification, coverage analysis, Assembly, systemverilog, RTL SoC Subsystem verification, UVM Portable Stimulus, Formal verification flows, functional test vector development, UVM verification, test plan definition, UVM environment development, Power Aware verification, post-silicon bring-up debug, ARM based CPUs, testcase development in C, use-case verification
Skills:
Rtl Design, Subsystem design, Axi, SoC integration, APB, Subsystem IP integration, Microarchitecture
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