Senior Design Verification Engineer
Senior Design Verification Engineer
Smart Soc SolutionsThis job is no longer accepting applications
Job Description
Take the lead in advanced design verification!
We're looking for a Senior Design Verification Engineer in Bangalore to work on:
- HBM
- DDR
- UCIe
- PCIe protocols, and more.
Key Skills: System Verilog/UVM, protocol verification
Experience Required: 3+ Years
Join our team and help shape groundbreaking designs.
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Key Skills
About Company
SmartSoC Solutions is emerging as a leader in providing engineering solutions worldwide. We offer end-to-end Semiconductor, Embedded, Automotive and System Design to design and build next-generation leadership products under one roof. And allowing clients to achieve both quick wins and long-term results.
Our goal is to be an extended arm of engineering product and IT companies and ensure good quality productization cost-effectively.
Skills:
Pcie, System Verilog, Python, Systemc, Hybrid test benches, MDV, DV signoffs, SV, Uvm, UCIe, Axi, CDV
Skills:
Usb, DDR, Perl, Pcie, Ethernet, Python, Tcl, Uvm, coverage-driven verification, systemverilog, digital design RTL understanding, AMBA, MIPI, SVA
Skills:
Cadence Tools, Gate level simulations, VHDL, Formal verification methodologies, VAMS, Testbench creation, Uvm, systemverilog, Motor control for BLDC BSM motor driver devices
Skills:
Perl, Python, Tcl, DisplayPort, HDMI, MIPI DSI, Uvm, systemverilog
Skills:
Spi, I2c, Uart, Pcie, Usb, Noc, cdc, SoC IP Design, AMBA protocols, Network on Chip