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Job Description

  • 710 years of experience in RTL design and SoC integration
  • Strong knowledge of Verilog, VHDL, and micro-architecture design
  • Hands-on experience with Spyglass Lint, CDC, DC Synthesis, and VCLSP
  • Proficiency in scripting languages: Perl, Python, Shell, Tcl
  • Solid understanding of SoC flows and IP development
  • Familiarity with Synopsys/Cadence tool flows
  • Exposure to ARM Cortex, DMA, DDR, SPI, I2C, UART, AHB/AXI/APB, Ethernet, USB, PCIe, MIPI CSI/DSI, LPDDR
  • Bachelor's degree (B.E/B.Tech) in Engineering or related field
  • Strong analytical and communication skills

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Open to candidates from:
Indian

About Company

Capgemini is an AI-powered global business and technology transformation partner, delivering tangible business value. We imagine the future of organizations and make it real with AI, technology and people. With our strong heritage of nearly 60 years, we are a responsible and diverse group of 420,000 team members in more than 50 countries. We deliver end-to-end services and solutions with our deep industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design, engineering and business operations. The Group reported 2024 global revenues of €22.1 billion.

Job ID: 131355381

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