Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow
Perform design verification and drive physical layout design and verification
Provide support and perform other duties as assigned
The Impact You Will Have
Contribute to the development of high-performance silicon chips and supporting software content
Enhance the efficiency and performance of CMOS non-volatile memory designs
Drive innovation in memory design for speed, power, and density
Ensure the highest quality in both circuit and physical layout design
Collaborate effectively with CAD and Frontend engineers to streamline automation and verification workflows
Support the continuous improvement and advancement of memory design technologies
What You'll Need
Bachelor's or Master's degree in Electrical Engineering, Telecommunication, or related fields
Proficiency in CMOS memory design (NVM or SRAM), circuit simulation, memory layout design, layout parasitic extraction, and layout verification/debugging
Familiarity with analog circuit elements such as charge pumps, voltage regulators, current mirrors, voltage/current references, and comparators (preferred)
Programming capability in C-Shell or Perl
Strong analytical and problem-solving skills with exceptional attention to detail
Experience in preparing documents, reports, and presentations across various tasks
