- Own functional verification of both coherent and non-coherent IP designs
- Collaborate with industry leaders across HPC, Data Centre, Mobile, Automotive, and IoT to meet stringent verification demands
- Architect and develop SystemVerilog UVM-based testbenches, verification components, checkers, scoreboards, and VIPs
- Develop and execute verification plans aligned with functional coverage goals
- Drive closure of functional coverage and ensure complete verification of designs
- Debug and resolve verification environment issues to ensure robustness and reliability
The Impact You Will Have:
- Improve the performance and reliability of products across HPC, Data Centre, and Client systems
- Strengthen the verification protocols for mobile and automotive applications
- Accelerate verification readiness for growing IoT product portfolios
- Shape the evolution of system verification methodologies through industry collaboration
- Enable efficient implementation and integration of high-quality verification IPs
What You'll Need:
- B.E/B.Tech with 1015 years or M.E/M.Tech with 912 years in VLSI Design/Microelectronics
- Expertise in architecting and implementing SystemVerilog UVM-based verification infrastructure
- Hands-on experience with functional verification of high-speed protocols: UCIe, PCIe, CXL, USB, MIPI, HDMI, Ethernet, DDR/LPDDR, HBM
- Strong debugging and problem-solving skills in complex verification environments
- Excellent team collaboration and communication abilities
