
Search by job, company or skills
We are looking for a Design Engineer (7-12 years) to join our PCIe Design Team, working on next‑generation high‑speed interface IPs.
Key Responsibilities & Skills
Must Have : Hands‑on experience in PCIe design and micro‑architecture
Strong proficiency with design tools and a solid understanding of PPA (Performance, Power, Area) optimization techniques
Must Have : Good knowledge of scripting and applying AI-assisted design tools in the development flow
Strong debug skills and ability to collaborate closely with DV teams to resolve design issues
Highly Desired Skill : knowledge on Integrity and Data Encryption (IDE) : AES Encryption/Decryption algorithm along with GCM protocol.
Desired Skill : Automotive/FuSa experience
Qualifications
B.Tech / M.Tech in Electronics, Electrical, or Computer Science
If you're passionate about high-speed interfaces and enjoy working on complex, performance‑critical designs, we'd love to connect.
Cadence is a health technology company helping the nation’s most patient-centric health systems deliver more consistent, proactive healthcare every day. Cadence’s remote patient intervention solution couples powerful new technology with clinical excellence, providing its patients a precise and personal level of care all outside of the four walls of the hospital.At Cadence, we aim to exceed the expectations of our patients, clinicians, and partners every day. Our team values trust and autonomy, and we empower one another to make decisions, solve problems and build something better. We give clear, candid feedback with the utmost honesty and encouragement. If you’re interested in joining us, explore opportunities at www.cadence.care.
Job ID: 148288943
Skills:
code coverage , closure , Ovm, Perl, Tcl Scripting, Verilog, SDF, automation, Specman, SV, assertions development, constraint randomization, RTL, Uvm, GLS, formal verification, eRM methodology, test-bench development, HVL
Skills:
Scripting, Automotive FuSa, debug skills, GCM protocol, AI-assisted design tools, AES Encryption Decryption algorithm, PCIe design, Design Tools
Skills:
automation, Ovm, Tcl Scripting, Verilog, Perl, Uvm, GLS, RTL, SV, SDF sim debug, Specman, test-bench development, HVL, functional and code coverages, closure constraint randomization, assertions development, eRM methodology, formal verification
We don’t charge any money for job offers