Physical Design Engineer, Staff

Qualcomm Hardware Engineers plan, design, optimize, verify, and test various electronic and mechanical systems for world-class products, collaborating with cross-functional teams to develop solutions and meet performance requirements.

Role: Hardware Engineer (Physical Design - PNR Implementation)

Key Responsibilities:

• PNR implementation for Qualcomm SoCs.
• Complete ownership of PNR implementation (Floorplanning, Placement, Clock Tree Synthesis (CTS), post-route, etc.) on latest technology nodes.
• Good hands-on experience with Floorplanning, PNR, and Static Timing Analysis (STA) flows.
• Good knowledge of Placement/CTS, optimization, etc.
• Good understanding of signoff domains: LEC/CLP/PDN knowledge, etc.
• Signoff knowledge is mandatory (STA, Power analysis, Formal Verification (FV), low power verification, Physical Verification (PV), etc.).
• Quick learner with good analytical and problem-solving skills.

Skills:

• Good knowledge of Unix/Linux - Perl/TCL fundamentals/scripting.

Qualifications:

• 8+ years Hardware Engineering experience or related work experience.
• 6+ years experience with PNR flow in latest technology nodes (e.g., 4nm/5nm/7nm/10nm).

Minimum Education Requirements:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
• OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.