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Fresher
Early Applicant
  • Posted 2 months ago
  • Be among the first 10 applicants

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Proficient in RTL coding, datapath designs, complex FIFO design Strong knowledge on complete design flows and rigorous checks before delivery to other teams or customers ex- LINT, SDC, CDC, DFT, CLP, Synth and trial PnR Good experience of micro architecture, design, synthesize for a complex SerDes IP in various technology nodes. Desired Protocols knowledge - USB, PCie, MIPI(DPHY), HDMI/Display Work closely with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuits Good understanding of working with signal processing IPs in terms of knowing calibrations, plls, dividers.

We're doing work that matters. Help us solve what others can't.

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Job ID: 144539355

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