Lead Design Engineer

Uart, Spi, Verilog, I2c, LINT, cdc, MAS development, Sub-system design, SoC integration, ip design, Quality check flows, AMBA bus protocols, Axi, APB, RTL Coding, Medium complexity protocol, AHB, Microarchitecture

redhawk , Perl, Tcl, Yaml, Sta, BaseDRC, Synthesis, CTS extraction, Fusion Compiler, Formality, LVS analysis, Timing Analysis, Place And Route, Power Efficiency techniques, primetime, Physical Verification, timing eco’s, EM fixes, DRC, ECO methodologies, ICV, Cadence Innovus flow