Search by job, company or skills

Lead Design Engineer

Lead Design Engineer

Cadence
Fresher
Not Disclosed

This job is no longer accepting applications

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • IP Integration and release Engineer forSSG IP Release engineeringteam.
  • Position is based inBangalore.
  • The role would include IP integration, verification, and release of the IP solution of Cadence to different customers.
  • The work involved will be working with the existing RTL, integration of the PHY and controller to create the sub-system, addition of new features into the RTL, ensuring various customer configurations are clean as part of verification regressions, supportingcustomers, ensuring design is clean for LINT and CDC design guidelines.
  • Proficient in ASIC development flows like Lint/CDC/Synthesis (preferably with Genus)/STA. Ability to debug and setup new flows.

Position Requirements:

  • BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design verification engineer, with a large portion of the recent work experience on RTL integration and verification.
  • 6-10 years of coreRTL integration and verificationexperienceusing Verilog is a must.
  • System Verilog experience and experience with UVM based environment usage / debugging is required.
  • PCIe/CXL/IDEexperience is highly desirable. Prior experience in implementation of complex protocols is a must.
  • Prior experience in IP development teams would be an added advantage.

Scripting knowledge is an advantage.

We're doing work that matters. Help us solve what others can't.

More Info

Job Type:
Function:
Employment Type:

Key Skills

About Company

Additional Jobs Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. Read the policy(opens in a new tab) We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com . Privacy Policy: Job ApplicantIf you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) . E-VerifyCadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify(64K) Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Similar Jobs

Bengaluru
Skills:
conformal lec , Unix, Clp, Perl, Linux, Python, Tcl, LEC, CPF-based power intent, UPF, Cadence Genus, ASIC synthesis, IEEE 1801, low-power verification flows
Bengaluru, India
Skills:
clocking , Arm, Trace32, Multimedia, Microprocessors, Computer Architecture, interconnect safety, Synthesis, Security, ARM Debug, Ace, RTL design flow, Verilog RTL coding, RISC-V, APB, Axi, Reset, ATB, BUS Protocols, Chip Assembly, LINT, RTL signoff tools, Serial Interfaces, cdc, ARM CoreSight ETM, IP Integration, Arm Cortex-M A R processor-based SoC debug infrastructure, External Bus Interfaces, RDC, System modes
Bengaluru, India
Skills:
conformal lec , Unix, Clp, Linux, Tcl, Python, Perl, Cadence Genus, UPF, LEC, IEEE 1801, CPF-based power intent, low-power verification flows, ASIC synthesis