Layout engineer

Layout Positions based out of Hyderabad/Bangalore. Kindly prioritize sourcing and submit only candidates who meet the mandatory criteria mentioned below.

Mandatory Requirements:

• Experience: 4 to 6 years
• Location: Hyderabad
• Work Mode: In-person interview mandatory
• Technology Requirement: Candidates must have hands-on experience on TSMC 3nm node with a minimum of 3 to 6 months of real-time project experience
• Only relevant and technically matching profiles should be submitted

Notice Period:

• Candidates with a notice period exceeding 15 days will not be considered
• Immediate joiners or candidates serving short notice are highly preferred

We are preferably looking for below skills:

• TSMC 16/12nm,7nm,5nm,3nm and below (other foundries are also fine like Intel, Samsung, GF). Preferably TSMC 5nm/3nm experience.
• Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support.
• Verification flows - LVS/DRC/DFM/Antenna check/EMIR experience.
• Responsible for on-time delivery of block-level layouts of acceptable quality.
• Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must.
• BE or MTech in Electronics/VLSI Engineering
• Good communications skills as we work with cross-functional teams.
• Share the profiles who have good hands-on experience in recent times on lowers nodes. 
• TM should work independently.
• 4 to 8 years of experience – flexible
• If a candidate has HBM experience, it is an added advantage. Analog blocks like Regulators/Charge pumps/Power Management etc..