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IP RTL Design Engineer
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Position Summary
About Samsung Semiconductor India Research (SSIR)With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more. As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability high performance and value added services that enable Samsung Electronics deliver world-class products.Role and Responsibilities
Samsung Semiconductor India Research (SSIR) is seeking an experienced RTL/Logic Design Engineer to join the Memory PHY IP development team. The role will focus on the development of HBM, LPDDR PHY projects, delivering highperformance PHY IP for our customers and providing postsilicon support.
Write, verify, and maintain synthesizable RTL for LPDDR PHY blocks
-Write SDC constraints, synthesize and ensure timing closure.
-Setup and run IPXACT, LINT, CDC, SDC, PreSTA, DFT and ATPG checks
-Support silicon validation bring-up and debug post-silicon issues
-Work closely with internal and external customers to understand requirements and timely deliverables
Required Qualifications:
-4 years of fullcycle RTL/logic design experience, preferably in memoryPHY or highspeed interface IP.
-Strong RTL coding background (Verilog/SystemVerilog)
-Proficiency with QC tools such as LINT, CDC, DFT, ATPG
-Experience in SDC creation, Synthesis & STA
-Prior work onLPDDR, HBM PHYprojects is preferred
Skills and Qualifications
Experience - 4 to 10 Years of experience
Qualifications
B.Tech/B.E/M.Tech/M.E
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltdis dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
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Samsung R&D Institute India-Bangalore (SRI-B) is the largest R&D Center outside of South Korea and a key innovation hub in the Samsung group.
Job ID: 147668639
Skills:
Usb, DDR, Pcie, Verilog, Ethernet, LINT, Sta, Synthesis, cdc, UCIe, systemverilog, spyglass, VHDL, formal checking, RDC, HBM
Skills:
catapult , Vcs, Ecos, Verilog, System Verilog, spyglass, LINT, Timing Analysis, Synopsys DC, cdc, Rtl Design, Verdi, VHDL, Stratus, Xcellium, SDC, Dft, Magillem, low power design methodologies
Skills:
C, Makefile, Perl, Python, Tcl, Systemc, ARM bus protocols, Root of Trust verification, secure processor verification, cryptographic IP verification, formal verification tools, assertion-based verification, Uvm, regression debug, test bench architecture, directed testing, coverage-driven verification, systemverilog, constrained-random verification, security property checking, SoC protocols, EDA Tools
Skills:
Verilog, RDC, LINT, ISO 26262, Safety analysis methodologies, Functional Safety concepts, RTL design and integration, systemverilog, ASIL requirements, Synthesis checks, cdc, Micro-architecture development
