Emulation
Emulation
Mahindra Satyam- Posted 20 hours ago
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Job Description
We are seeking an experienced Emulation Consultant with strong expertise in Cadence Palladium emulation, post-silicon debug, and software bring-up for complex SoC/ASIC platforms. The role requires hands-on experience in reproducing silicon issues on emulation platforms, running and debugging software workloads, peripheral protocol validation, and test development. The ideal candidate will possess strong debugging skills across hardware and software domains and be capable of supporting silicon validation and root-cause analysis activities.
Key Responsibilities
- Work extensively with Cadence Palladium emulation platforms for pre-silicon and post-silicon validation activities.
- Reproduce and debug silicon-reported issues on Palladium emulation environments.
- Develop, execute, and maintain software test suites on emulation platforms.
- Perform software bring-up and porting activities for new hardware platforms.
- Debug and validate peripheral interfaces including UART, SPI, I2C, GPIO, and other embedded protocols.
- Analyze hardware-software interactions and support root-cause identification of functional issues.
- Develop and maintain C-based validation test cases for feature verification and regression testing.
- Create and execute automated test cases in Python-controlled post-silicon validation benches.
- Collaborate closely with silicon validation, firmware, RTL, design verification, and architecture teams to resolve critical issues.
- Develop debug methodologies and automation scripts to improve validation productivity and coverage.
- Support regression execution, failure analysis, and issue tracking throughout the product lifecycle.
Required Qualifications
- 5–8 years of relevant experience in Emulation, Post-Silicon Validation, Silicon Debug, or SoC Verification.
- Bachelor's or Master's degree in Electronics, Electrical, Computer Engineering, Embedded Systems, or related field.
- Strong hands-on experience with Cadence Palladium Emulation flows and debugging methodologies.
- Experience in reproducing and analyzing silicon issues in emulation environments.
- Good understanding of SoC architecture, embedded systems, and silicon validation flows.
- Strong knowledge of peripheral protocols such as: UART, SPI, I2C. GPIO
- Hands-on experience in software bring-up, test execution, and firmware validation.
- Proficiency in C programming for validation and debug test development.
- Experience with Python-based automation frameworks and post-silicon validation environments.
- Strong debugging and problem-solving skills across hardware and software domains.
- Excellent communication and cross-functional collaboration skills.
Preferred Qualifications
- Experience in Post-Silicon Validation and silicon bring-up activities.
- Exposure to embedded Linux, firmware debugging, or low-level driver validation.
- Knowledge of emulation acceleration flows and hybrid verification environments.
- Experience with scripting languages such as Python, Shell, or Tcl.
- Prior experience working on complex SoC/ASIC products in consumer, automotive, networking, or industrial domains.
More Info
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Key Skills
Python-based automation frameworks
software bring-up
Cadence Palladium emulation
peripheral protocol validation
About Company
Skills:
clocking , Ras, Python Scripting, Gpio, System Verilog, Verification debug tools, Fuse, Uvm, power management, Xeon Global flows, Reset flows, Security flows, Pre silicon validation
Skills:
lauterbach , Spi, C, Systemc, Usb, Shell, Tcl, Verilog, Jtag, Python, Pcie, Perl, DDR, Axi, Coresight, LPDDR, RTL, UltraSoC, Cadence Palladium, systemverilog, VHDL, Cadence Palladium XP, ZeBu
Skills:
Linux, Verilog, Unix Scripting, Cadence Palladium, Siemens Veloce, RTL Compilation, Synopsys ZeBu, Debugging Issue Analysis, Pre-Silicon Validation, systemverilog, Emulation Model Build Compilation
Skills:
C, C++, Shell scripting, Python, Emulation platforms and tools, Hardware emulators, Reproduction of Si issues on palladium, FPGA-based prototyping, EDA tools and associated workflows, Post Silicon debug, Writing C test cases, Running porting SW tests on palladium, Cadence Palladium flows
Skills:
Perl, Verilog, Python, Tcl, Cadence Palladium, RTL, Digital Design, emulation compile mapping, systemverilog, acceleration, ASIC SoC emulation, UVM-based verification environments, Synopsys ZeBu, runtime concepts, partitioning