Emulation Engineer
Emulation Engineer
leadic design pvt ltd7-9 Years
- Posted 14 hours ago
- Be among the first 10 applicants
Job Description
7+ years of experience in ASIC/SoC Emulation / Pre-Silicon Validation
Cadence Palladium(XP / Z1 / Z2 / Z3) Or ZeBu – Mandatory
Strong experience in Palladium or ZeBu compilation/build flows
Advanced Clocking, ICE & VIF flows
Strong programming skills in SystemC, C/C++
Scripting: Python, TCL, Perl & Shell
RTL: Verilog / SystemVerilog / VHDL
Debugging: Lauterbach, JTAG, Coresight/UltraSoC
SoC protocols: PCIe, DDR/LPDDR, AXI, USB, SPI
More Info
Key Skills
About Company
Skills:
clocking , Ras, Python Scripting, Gpio, System Verilog, Verification debug tools, Fuse, Uvm, power management, Xeon Global flows, Reset flows, Security flows, Pre silicon validation
Skills:
C, Cpu, Shell, Perl, Python, Tcl, Content Debug support, DSP Core, Place and Route Constraints, Emulation Platforms, Palladium, FPGA Prototyping, Synthesis, Waveform generation, Veloce, Clocking and System Debug, TCI
Skills:
Python Scripting, System Verilog, BFM models, GPU emulation
Skills:
FPGA Design, Python Scripting, Soc Architecture, Test Automation, systemverilog, Verification Methodology, Hardware Debugging, Signal Integrity, Performance Analysis, Emulation Tools
Skills:
Perl, Verilog, Python, Tcl, Cadence Palladium, RTL, Digital Design, emulation compile mapping, systemverilog, acceleration, ASIC SoC emulation, UVM-based verification environments, Synopsys ZeBu, runtime concepts, partitioning