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DFT Practice Head/ 15 years+
Key Responsibilities
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Qualification
s.
Preferred Skil
ng.
Intrested candidate can share your upadted resume to [Confidential Information] or Apply
Job ID: 151585891
Skills:
Silicon Validation, DDR, Sta, RTL Synthesis, P R Verification, SERDES, ASIC SOC design, MBIST, DFT methodologies, Mixed Signal IPs, Pll, Dft, ATPG, EDA Tools, Scan, manufacturing test flows
Skills:
logic bist , Usb, Perl, Pcie, Shell scripting, Static Timing Analysis, Python, Tcl, Memory BIST, Mentor, Cadence, IEEE 1149.1 JTAG, IEEE 1500, Analog Mixed-Signal test structures, DFT architecture, ATPG, EDA Tools, IEEE 1687 IJTAG, Siemens, Synopsys
Skills:
Shell, Perl, Vcs, ATPG, MBIST, MentorETVerify, Modelsim, TestKompress
Skills:
DFT insertion flows, JTAG 1149.1, IEEE1687, IEEE1500, Cadence tools and flows, SoC ASIC Digital Design, Timing Analysis, Verification of ATPG testbenches, Debug and Analysis of failures, LBIST, scan chain insertion, compression scan insertion, equivalency checks
Skills:
Tcl, Python, Perl, Scan Architecture, Gate-level Simulation, MBIST, Scan Insertion, ATPG, Scan Compression, DFT Validation, IEEE 1500 standards