Design Verification Lead
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Hi,
Greetings from ACL Digital,
Looking for Lead Design Verification Engineers
Exp Level:7+ Years
Location : Bangalore and Hyderabad
JD:
7+ Years of experience in Design verification
Must have Expertise:
1. Grounds up verification environment development using SV/ UVM is a must
2. One of the high speed protocols like PCIe or USB 3 or MIPI
3. Experience in testplanning
4. Experinece in leading a team of 5+ Engineers
5. Proficient in System Verilog and UVM
Big plus to have experience in:
1. TI FPD or ASA or Maxim GMSL protocol standard
2. FuSa verification is a big plus
3. Imaging design that involves CSI, DSI, eDP
4. Experience in effort and schedule estimation, tracking and technical leadership
Good to have experince in:
1. VIP development
2. FPGA
3. AMS Verification
Interested can Share Cv to [Confidential Information]
Job ID: 153642295
Skills:
System Verilog, WREAL, Spice, Uvm, functional tests, RNM, Co simulation RTL, verification test benches, Vams modelling, AMS Verification, RISC CPU, Analog blocks
Skills:
Usb, Vcs, DDR, Pcie, Perl, Python, Tcl, Uvm, systemverilog, Axi, DVE, Modelsim, AHB
Skills:
AI ML techniques, Uvm, systemverilog, Coverage-driven verification
Skills:
System Verilog, chip design flow, constrained-random verification environments, design verification methodologies, hardware verification languages, Specman, ASIC standard interfaces, verification techniques, performance verification of ASICs, memory system architecture
Skills:
Usb, Mac, Perl, Pcie, Ethernet, Shell scripting, System Verilog, Python, Tcl, AHB-Lite, Uvm, AMBA, Axi, APB
