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About the Role
We are seeking a highly skilled Design Verification Engineer with strong expertise in functional verification and high-speed protocol verification. The ideal candidate will have proven hands-on experience with System Verilog, UVM, deep understanding of PCIe, USB, Ethernet/MAC, and AMBA protocols, and the ability to architect and execute robust verification strategies. In this role, you will work closely with design architects and cross-functional teams to ensure design correctness, compliance, and performance at block, subsystem, and SoC levels.
Qualification & Key Responsibilities :
Job ID: 153584147
Skills:
DDR, Usb, Pcie, Ethernet, SV, CXL, Uvm
Skills:
Usb, DDR, Shell, Pcie, Perl, Ethernet, Python, CHI, SystemVerilog UVM, Axi, CXL, SVA
Skills:
Tcl Scripting, Doors, Knowledge of Hardware Board and different components like ADC DAC Serial Memory, DO-254 development process, Electronics Electrical Engineering, Hardware system design knowledge of digital logic, RTL development using VHDL, FPGA verification developing Test case Test procedures Test bench debug and simulation using Modelsim Questasim, FPGA Synthesis Place and Route, Developing timing constraints solving CDC issues timing analysis and timing closures for FPGA, Requirement analysis and validation, Different bus protocols like I2C SPI QSPI UART AXI DDR3 4 PCIe JTAG, FPGA design tools like Libero
Skills:
Doors, Tcl Scripting, FPGA Synthesis Place and Route, DO-254 development process, RTL development using VHDL, Hardware system design knowledge of digital logic, Different bus protocols like I2C SPI QSPI UART AXI DDR3 4 PCIe JTAG, FPGA verification developing Test case Test procedures Test bench debug and simulation using Modelsim Questasim, Developing timing constraints solving CDC issues timing analysis and timing closures for FPGA, FPGA design tools like Libero, Electronics Electrical Engineering, Knowledge of Hardware Board and different components like ADC DAC Serial Memory
Skills:
Test Case Creation, Shell, Perl, Python, Advanced Debugging skills, Uvm, testbench development, coverage-driven verification, Computer Architecture concepts, Formal Verification techniques, Functional Verification, Rtl Design