Design Verification Engineer
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SoC Verification Engineer
Experience: 4 to 8 Years
Qualifications: B.Tech/B.E/M.Tech/M.E
Location: Bangalore
Role and Responsibilities:
Skill Requirements:
Interested candidates can share resume to [Confidential Information]
Job ID: 151203235
Skills:
Computer Architecture, Vcs, DDR, Pcie, Perl, Ethernet, Python, Verdi, ARM-based SoC architecture, CHI, Xcelium, SystemVerilog UVM, Axi, APB, HBM, Questa, AHB, SVA
Skills:
System Verilog, Ethernet, Ovm, Pcie, DDR, CHI, Uvm, ARM Based SoC Verification, VMM, UFS
Skills:
Usb, Jtag, Pcie, Perl, Ethernet, Python, System Verilog, UVM methodology, Design for Debug, scripting in Linux Unix environments, SoC architecture verification, TSN, ARM based SoC verification, High speed USB
Skills:
Scripting Languages, Sed, Awk, Perl, ARM processor based SoC architecture, ASIC design flow, ASIC verification methodologies, C Assertions coding, multi-core multi-layer APIs, functional coverage, SV-UVM, constraint random test generation, UVM assertion based coverage driven verification, ARM based SOC software framework
Skills:
C, Makefile, Perl, Python, Tcl, Systemc, ARM bus protocols, Root of Trust verification, secure processor verification, cryptographic IP verification, formal verification tools, assertion-based verification, Uvm, regression debug, test bench architecture, directed testing, coverage-driven verification, systemverilog, constrained-random verification, security property checking, SoC protocols, EDA Tools
