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Mirafra Technologies hiring for a Design Verification Engineer with 5+Yrs Experience.
Location-Bangalore/Hyderabad
Qualification-BE/B Tech/M Tech
1. Must Have: SoC or IP Verification
2. Experience Languages: System Verilog
3. Methodologies: OVM/UVM/VMM
4. Protocols: PCIE/DDR/Ethernet/UFS/CHI
5. Processor/ARM Based SoC Verification experience
6. Candidate must have expertise in System Verilog.
7. Experience in ARM base SoC Verification
8. Strong Analytical skills are desirable if having worked
Kalpana Bhatia
TA-Lead-Mirafra
[Confidential Information]
Job ID: 147210185
Skills:
analog circuits , Fpga, Logic Design, Verilog, Sta, Scan Insertion, Power product design, Uvm, Synthesis scripts, ATPG generation, Regression frameworks, Synthesis, formal verification, Micro-architecture, ABV, RTL Coding, Timing Constraints, Functional Verification, System-Verilog, Digital Verification, Timing Analysis
Skills:
Verilog, advanced stimulus generation techniques, Uvm, coverage-driven verification, systemverilog
Skills:
Usb, DDR, Shell, Perl, Ethernet, Python, Emulation, UVM methodology, high-speed interfaces PCIe, systemverilog, scoreboards, industry-standard simulators and tools, formal verification, ASIC SoC architecture, functional coverage assertions, debugging skills, low-power verification UPF, SVA
Skills:
Register modeling, coverage analysis, firmware interaction, regression management, SERDES, Uvm, systemverilog, PHY architectures
Skills:
Asic verification, digital design verification, Uvm, test bench architecture, systemverilog, GIT version control, functional coverage, C Language
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