Design Verification Engineer/Senior Engineer
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Mirafra Technologies hiring for a Design Verification Engineer with 5+Yrs Experience.
Location-Bangalore/Hyderabad
Qualification-BE/B Tech/M Tech
1. Must Have: SoC or IP Verification
2. Experience Languages: System Verilog
3. Methodologies: OVM/UVM/VMM
4. Protocols: PCIE/DDR/Ethernet/UFS/CHI
5. Processor/ARM Based SoC Verification experience
6. Candidate must have expertise in System Verilog.
7. Experience in ARM base SoC Verification
8. Strong Analytical skills are desirable if having worked
Kalpana Bhatia
TA-Lead-Mirafra
[Confidential Information]
Job ID: 147210185
Skills:
Computer Architecture, Vcs, DDR, Pcie, Perl, Ethernet, Python, Verdi, ARM-based SoC architecture, CHI, Xcelium, SystemVerilog UVM, Axi, APB, HBM, Questa, AHB, SVA
Skills:
performance verification of ASICs, assertion-based verification, Uvm, formal tools, ASIC standard interfaces, systemverilog, Design Verification, memory system architecture, verification components
Skills:
Ovm, Spi, Shell, Pcie, Verilog, I2c, Python, Usb, Can, Perl, Ethernet, Tcl, ARM Protocols, IP Verification, Uvm, GLS, Mipi, Emulation, Test bench model VIP development, dsi, LPDDR, CSI, SoC Verification, SV, AMs, LEC, Functional coverage, Axi, APB, AHB
Skills:
DDR, Pcie, Verilog, Ethernet, Python, Cadence Incisive, UCIe, Uvm, Synopsys VCS, formal verification, VHDL, Modelsim
Skills:
simvision , Shell, Vcs, Python, Tcl, Verdi, Xcelium, QuestaSim, Uvm, systemverilog
