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• IP verification Using SV/UVM
• SOC Verification using C/SV
• Third Party VIP Integration
• Interconnect Protocols: AHB, AXI, APB
• SOC Interfaces: GPIO, SPI, I2C, UART (4+)
• High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI (7+)
• Memory Interfaces: DDR or HBM I/O (10+)
• Coverage Closure: Code, Functional and Toggle
• Tools: Synopsys VCS or Cadence Incsive
• Technical Documentation: Testbench Specification, Test Plan Specification
• Foundry Porting Experience: Technology Library Conversion Related Changes Verification
Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3000+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs.
Job ID: 104666449
Skills:
Pcie, SV, CXL, PCI-E, LPDDR, UCIe, DDR4, Uvm, USB 3.0
Skills:
Usb, DDR, Shell, Perl, Ethernet, Python, Emulation, UVM methodology, high-speed interfaces PCIe, systemverilog, scoreboards, industry-standard simulators and tools, formal verification, ASIC SoC architecture, functional coverage assertions, debugging skills, low-power verification UPF, SVA
Skills:
test environments , C, Soc Architecture, Test Cases, Shell, Verilog, Python, industry-standard simulators, Mixed signal designs, SV, regression systems, Uvm, revision control systems, verification testbenches
Skills:
Mac, Pcie, Verilog, Ethernet, high-speed interfaces, Siemens Veloce, Palladium, Cadence, systemverilog, full-chip verification, SoC-level integration, UVM-based verification environments, SoC Verification, ZeBu, SERDES, D2D, Synopsys, functional coverage
Skills:
code coverage , Ethernet, Pcie, Uvm, SV, formal-based verification, mixed signal IP, PIPE, Specman, AMBA, DDR verification, SERDES
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