Senior Design Verification Engineer

Job Title: Staff/Senior Design Verification Engineer (SoC)

Location: Bangalore

Experience: 8+ Years (Targeting strong SoC & Subsystem focus)

Notice Period: Immediate to 30 DaysRole Summary

Seeking a highly skilled Design Verification Engineer to lead end-to-end SoC verification strategies. The ideal candidate will architect scalable UVM environments, drive coverage closure for complex protocols, and guide silicon bring-up/tape-out readiness.Key Responsibilities

• Verification Strategy: Drive SoC/IP-level verification planning, defining feature- and block-level strategies.
• Environment Ownership: Build and maintain scalable UVM verification environments from scratch, including reusable agents, monitors, and scoreboards.
• Protocol Validation: Lead validation for high-speed protocols including PCIe (Gen 4/5/6), AMBA (AXI/AHB/APB), NoC, and memory controllers (LPDDR4/5).
• Debug & Analysis: Perform complex RTL/firmware debug (VCS/Verdi/Xcelium), including gate-level simulation (GLS), power-aware (UPF) verification, and post-silicon support.
• Automation: Enhance verification efficiency by automating regression flows and report generation using Python, Shell, or Tcl scripting.
• Leadership: Mentor junior engineers, conduct code/testbench reviews, and collaborate with cross-functional architecture and design teams for issue closure.

Technical Requirements

• Core Methodology: Expert-level proficiency in SystemVerilog and UVM (Universal Verification Methodology).
• Architectural Knowledge: Deep understanding of SoC/Subsystem architecture, bus fabrics, and coherency protocols (e.g., CHI).
• Verification Tools: Hands-on experience with industry-standard simulators (VCS, Xcelium, QuestaSim) and waveform debuggers (Verdi, SimVision).
• Advanced Concepts: Familiarity with coverage-driven verification, assertion-based verification (SVA), and C/C++ based testcases for SoC-level bring-up.
• Functional/Code Coverage: Proven track record of driving coverage closure to meet sign-off metrics

If you are interested in proceeding, please share your updated resume with us at [Confidential Information] so we can review it in detail.