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Job ID: 145418875
Skills:
test environments , Test Cases, Low-power design verification, Regression systems, Industry-standard simulators, Verification methodology, Revision control systems, Verification testbenches, Functional coverage, systemverilog
Skills:
Debugging, coverage closure, IP SoC level verification, verification methodology, assertions, AMBA AHB protocol, functional code coverage, Uvm, testbench components, systemverilog
Skills:
Verilog, VHDL, simulation debugging, DO-254, traceability validation methodologies, coverage-driven verification, systemverilog
Skills:
Python, Tcl, Analog mixed-signal IC design, behavioral modeling, systemverilog, Spectre, Rtl Design, Verification methodologies, Mixed-signal simulation tools, Verilog-AMS, AMS Designer, Cadence Virtuoso
Skills:
Git, Perl, Jira, Python, Uvm, systemverilog
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