Design Verification Engineer
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Attention Design Verification Engineers ! Elevate your career to new horizons ! Your quest concludes here – embrace the chance to embark on a transformative journey with Digicomm Semiconductor Private Limited as your next professional milestone.
Responsibilities
Qualifications : BTECH/MTECH
Experience : The Engineers with 2 to 8 years of Experience
Job ID: 153866383
Skills:
Usb, Vcs, DDR, Pcie, Ethernet, System Verilog, Xcelium, UVM methodology, UCIE, Axi, Questa, CXL
Skills:
Makefile, Perl scripting, Verilog, Oop Concepts, Ruby, System Verilog, Post-silicon debugging, CPU architecture, Verification flows, Rtl Design, Asic Design Verification, JTAG protocols, Digital Design, Debugging firmware, Assembly language programming
Skills:
System Verilog, SV UVM based test benches, scripting languages such as Perl, HDLs like Verilog, debugging RTL TB issues using Verdi or similar tools
Skills:
Pcie, Perl, Python, Tcl, protocol-level debugging, simulation and debug tools, verification methodology, UCIe, Uvm, FDI, systemverilog, coverage closure, CXL, RDI, SVA
Skills:
Perl, Verilog, Python, Uvm, SVA, systemverilog
