Search by job, company or skills

Tessolve

Design Lead

Save
new job description bg glownew job description bg glownew job description bg svg
  • Posted 15 hours ago
  • Be among the first 10 applicants
Early Applicant

Job Description

About Us

Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs.

Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. Tessolve's design services include solutions on advanced process nodes with a healthy eco-system relationship with EDA, IP, and foundries. Our front-end design strengths integrated with the knowledge from the backend flow, allows Tessolve to catch design flaws ahead in the cycle, thus reducing expensive re-design costs, and risks. We actively invest in the R&D center of excellence initiatives such as 5G, mmWave, Silicon photonics, HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-end product design services in the embedded domain from concept to manufacturing under an ODM model with application expertise in Avionics, Automotive, Industrial and Medical segments. Tessolve's Embedded Engineering services enable customers a faster time-to-market through deep domain expertise, innovative ideas, diverse embedded hardware & software services, and built-in infrastructure with world-class lab facilities.

Tessolve's clientele includes Tier 1 clients across multiple market segments, 9 of the top 10 semiconductor companies, start-ups, and government entities. We have a global presence over 12 countries with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.

For more details, visit https://www.tessolve.com/

Job Overview

Join our innovative team as a PDK Lead Engineer in the semiconductor industry, contributing to advancements in PDK development, validation, and delivery. Collaborate with internal and external partners to facilitate efficient design flows and provide mentorship. This role emphasizes strategic leadership in PDK cycles, quality assurance, and ensuring seamless integration with top EDA tools, significantly impacting time-to-market for advanced semiconductor technologies.

Job Designation: PDK Lead Engineer

Years of Exp: 8–12 years

Job Location: Hubli

What You'll Do

  • Lead PDK development and validation across technology nodes.
  • Manage PDK release cycles, ensuring compliance with specifications.
  • Partner with EDA, CAD, and layout teams for seamless flow integration.
  • Collaborate closely with foundry partners for updates and debugging.
  • Guide and support a PDK/technology enablement team.

Who You Are

  • Skilled in EDA tools: Cadence, Synopsys, Mentor.
  • Proficient in semiconductor processes and device physics.
  • Experienced in scripting: Python, Perl, SKILL, Tcl.
  • Proven leadership capabilities in team management.
  • Experience with foundries like TSMC, Samsung is a plus.

Tessolve Semiconductor Private Limited, as well as its affiliates and subsidiaries (Tessolve) does not require job applicants to make any payments at any stage of the hiring process. Any request for payment in exchange for a job opportunity at Tessolve is fraudulent and should be ignored. If you receive any such communication, we strongly advise you to refrain from making any payments and to promptly report the incident to us at [Confidential Information]. Tessolve is not responsible for any losses incurred due to such fraudulent activities

More Info

Job Type:
Function:
Employment Type:

About Company

Job ID: 147216003

Similar Jobs

Bengaluru, India

Skills:

power analysisDDR testing methodologiesverification flowdebug validationSTA simulationIR-drop mitigationspyglassAteDftTessentSERDESpatterns generationTiming Closuresilicon bring-upASIC DFT synthesisSynopsys

Bengaluru, India

Skills:

ShellPerlPythonTcladvanced Design languagesSOC IP IntegrationRtl Design

Bengaluru, India

Skills:

PERLTclSTA toolsphysical verification toolsCadence Innovussynthesis Place and Route workflows

Bengaluru, India

Skills:

CVcsPerlVerilogHardware Emulation PlatformscdcASIC SoC development cyclesystemverilogRtl DesignspyglassEVEASIC DesignVeloceformal verification

Bengaluru, India

Skills:

low power designTiming ClosureSynthesisVerilog RTL developmentFront-end EDA toolsRTL design verificationDigital IP ASIC designPost silicon validationDesign quality checks