ASIC Engineer, Host & Userspace, Infra Silicon Enablement
ASIC Engineer, Host & Userspace, Infra Silicon Enablement
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Job Description
Meta is looking for ASIC Engineer, Host & Userspace, Infra Silicon Enablement to join our dynamic team and embark on a rewarding career journey.
- Develop and implement ASIC design methodologies, including design, verification, and testing
- Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs
- Develop and maintain design specifications, test plans, and documentation
- Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis
- Perform design optimization and analysis to ensure optimal performance and power efficiency
- Ensure compliance with industry standards and guidelines.
- Strong knowledge of ASIC design methodologies and tools.
- Excellent communication and interpersonal skills Strong analytical and problem-solving skills
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Key Skills
ASIC development cycle
ASIC design methodologies
Host & Userspace
Infra Silicon Enablement
About Company
Skills:
User Support, power analysis, Verilog/SystemVerilog, ASIC Design, RTL Coding, Infra
Skills:
power optimization , Cpu, Noc, Tcl, Verilog, Networking, System Verilog, Python, Perl, LINT, Synthesis, High-Level Synthesis, Micro-architecture Development, Peripheral Subsystems, cdc, RTL Coding, Formal Verification Methodology, Timing Closure, Shell-scripting, power analysis
Skills:
static timing analysis, place-and-route, power analysis, Synthesis, multi-voltage domain design, Timing Closure, timing signoff, ASIC physical implementation, low-power implementation techniques
Skills:
ASIC development cycle, ASIC design methodologies, develop solutions, cross-functional teams, Rtl Design, architecture, Verification