ASIC Engineer, Formal Verification
- Posted 14 days ago
- Be among the first 30 applicants
Job Description
Job description
Meta is looking for ASIC Engineer, Formal Verification to join our dynamic team and embark on a rewarding career journey.
- Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards and guidelines. Strong knowledge of ASIC design methodologies and tools. Excellent communication and interpersonal skills Strong analytical and problem-solving skills
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About Company
Skills:
C, Perl, Python, Tcl, Formal Verification methods, Formal verification techniques
Skills:
Scripting Languages, Debugging Tools, formal verification, model checking, systemverilog, Uvm, Static Analysis, Rtl Design, Verification Planning, coverage analysis
Early Applicant
Skills:
Rtl Design, Synthesis, ASIC development cycle, formal verification, ASIC design methodologies, architecture, Verification
Skills:
automation, Connectivity Verification SEQ, XPROP, AI tools, formal verification
Skills:
model checking, Logical Equivalence Checking, formal verification, Advanced Computer Architecture, Micro-architecture Concepts, PSL, SVA, systemverilog