ASIC Engineer, Design Verification
- Posted a month ago
- Over 50 applicants have applied
Job Description
Job description
Meta is looking for ASIC Engineer, Design Verification to join our dynamic team and embark on a rewarding career journey.
- Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards and guidelines. Strong knowledge of ASIC design methodologies and tools. Excellent communication and interpersonal skills Strong analytical and problem-solving skills
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Key Skills
About Company
Skills:
clocking , Ovm, DDR, Pcie, Verilog, Ethernet, Platform bring up in Emulators or Silicon, SOC boot flow, Constrained-random verification environments, Uvm, systemverilog, Power management flows, C SV tests, HSIO, Low Power Verification, Coverage report generation, System Verilog Assertions, RTL GLS level simulations
Skills:
Tcl, C, Python, Perl, Shell, System Verilog Assertions, Uvm, Emulation, systemverilog, Formal
Skills:
Verilog, Design Verification, implement IP/SoC verification plans, systemverilog, C/C++, ASIC development cycles
Skills:
Design Verification, ASIC Design, Verification Planning, systemverilog, Rtl Design
Skills:
Shell, Perl, Python, Tcl, Test Cases, Cadence Xcelium, Mentor QuestaSim, Synopsys VCS, Constrained Random Verification, Functional Verification, PCI Express PCIe protocol, ASIC SoC Design Verification, Functional Coverage Models, Verification Plans, Waveform analysis, Assertion-Based Verification SVA, Simulation Tools, SystemVerilog UVM, Testbenches, Assertions