At Best Nanotech, we are pushing the boundaries of high-performance analog/mixed-signal design. We are currently seeking a highly experienced
Senior Analog Layout Engineer to join our growing team in Bengaluru.
This is a senior-level role requiring deep technical expertise in advanced process nodes and the ability to lead complex layout activities from initial floorplanning to final tape-out.
Position: Senior Analog Layout Engineer
Experience: 7+ Years
Location: Bengaluru
Key Responsibilities
- Lead the physical design of complex analog mixed-signal blocks (e.g., SerDes, PLL, ADC/DAC, PMIC, High-speed I/Os) in advanced FinFET nodes (7nm/5nm/3nm).
- Collaborate closely with circuit designers to optimize layout for performance, focusing on matching, parasitics, EM/IR drop, and signal integrity.
- Own top-level floorplanning, block integration, and power grid redistribution layers (RDL).
- Drive the physical verification process (DRC, LVS, ERC, ANT) using Calibre and resolve complex violations.
- Mentor junior layout engineers, define layout methodologies, and improve design flow efficiency.
Required Skills & Experience
7+ years of hands-on analog layout experience.
Expert proficiency with Cadence Virtuoso XL/GXL and Mentor Calibre.
Proven track record of successful tape-outs in FinFET technologies.
Deep understanding of analog layout concepts: common-centroid matching, shielding, guard-ringing, and latch-up prevention.
Experience with top-level integration and floorplanning challenges.
If you are a seasoned layout professional looking to take ownership of challenging designs, we want to hear from you.
