Analog layout Engineer

Company: ACL Digital

Role: Analog Layout engineer

Experience: 8–12 Years

Location: Bangalore

About the Role:

ACL Digital is seeking a seasoned and hands-on Analog Layout Lead to drive critical IC layout activities. In this role, you will take ownership of block-level layout execution from initial floorplanning all the way through tapeout handoff, working closely with circuit designers and fellow layout engineers.

Key Responsibilities

• Independent Execution: Own and execute block-level layouts independently with minimal supervision, managing the process from floor planning to tapeout handoff.
• Design & Verification: Apply deep understanding of advanced layout effects and ensure robust verification using Calibre verification tools.
• Collaboration: Drive effective cross-functional collaboration with circuit designers and layout teams to optimize performance, area, and reliability.

Required Qualifications & Skills

• Experience:8–12 years of hands-on experience in Analog/Mixed-Signal IC Layout.
• Technical Expertise: Strong mastery of foundational analog concepts, including:
• Latch-up prevention
• Length of Diffusion (LOD) and Well Proximity Effect (WPE)
• Substrate isolation and Electro-Migration (EM)
• Technology Nodes:
• Experience working preferably in 40nm and/or 22nm nodes.
• Note: A mix of lower nodes (<16nm) and higher/planar nodes (>22nm) is acceptable. We are not looking for candidates with experience exclusively in lower nodes.
• Bonus: Exposure to FD-SOI technologies, particularly GF22FDX (recent GF22 experience is a strong plus, though not a strict hard filter).
• Verification: Strong proficiency with Calibre for DRC, LVS, and parasitic extraction sign-off.
• Soft Skills: Excellent communication skills with a proven ability to lead and collaborate effectively within a dynamic engineering environment.

Interested can share your CV at:

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