routing, Scripting Languages, circuit simulation tools, power analysis, Analog and Digital Circuit Design, physical design methodology, LVS, Physical Verification, Logic Synthesis, DRC, Noise analysis, electro migration, Placement, Clock Tree Synthesis

Perl, Python, Tcl, Innovus, primetime, Calibre, StarRC, ICC2, Voltus

hardware engineering , Static Timing Analysis (STA), Automation, Deep sub-micron technology, Multi-voltage domains, Circuit Design, Power gating, UPF, Physical Design, Synthesis, ASIC design flows, Sign-off optimizations, PNR, device physics, Low power design implementation

Power Delivery Networks (PDN), Ansys RedHawk-SC, Electromigration analysis, Cadence Voltus

Perl, Python, Tcl, Signal Integrity, Fusion Compiler, STA timing constraints, Cadence Innovus, Synopsys ICC2, ECO implementation

Routing, floorplanning, Sta, CTS, primetime, Fusion Compiler, ICC2, Innovus, PNR, Physical Design, Placement, Timing Closure, Sign-off

Physical Design Planning, Placement, Floor Planning