
Search by job, company or skills
Showing 9 jobs
Skills:
Noc, Usb, Vcs, DDR, Shell, Perl, Pcie, Ethernet, Python, Verdi, IUS, UVM environments, SystemVerilog UVM, GLS, coverage closure, debug tools, testbench architecture, Axi, IP SOC verification, Questa, CXL, CPU-based verification
Skills:
Usb, C, C++, Debugging, Test Plan, Object Oriented Programming, Writing Test Cases, Oop, DDR, Ethernet, Pcie, Perl, Tcl, Function coverage, Coverage driven verification, Uvm, IP Subsystem SOC ASIC Verification, Axi, Code coverage analysis, CXL, Test bench development, Simulation, System-Verilog
Skills:
C DPI Development, Hardware-Software Integration, Debugging Expertise, Scripting and Automation, Verification Planning, Uvm, systemverilog, SoC Verification, Coverage-Driven Verification
Skills:
Vcs, System Verilog, Verdi, DVE, Xcelium, Questa, Uvm, SVA assertions
Skills:
Usb, Nvme, DDR, Shell, Perl, Pcie, Verilog, Ethernet, Python, System Verilog, Tcl, UPF Low Power Verification, CHI, Linux development environments, Uvm, formal verification, ASIC design flows, Axi, CXL, NLP Testbench Verification, System Verilog Assertions
Skills:
Version Control Systems, Soc Architecture, Asic Design Verification, BFMs, UVCs, Regression automation, Functional and code coverage methodologies, Uvm, SoC IP verification environments, systemverilog, VIPs
Skills:
Shell, Version Control Systems, System Verilog, Python, Scripting, Soc Architecture, Perl, performance features, functional and code coverage methodologies, Advanced SystemVerilog, X86 based SOC DV, Uvm, coverage closure, Security, BFMs, UVCs, power management, regression automation, memory subsystems, Debug, interconnects, SoC IP verification environments, Asic Design Verification, debugging skills, SoC verification methodologies, simulation and verification tools, VIPs
Skills:
Soc Architecture, Version Control Systems, Uvm, BFMs, UVCs, SoC IP verification environments, Asic Design Verification, VIPs, Regression automation, Functional and code coverage methodologies, systemverilog
Skills:
rtl verification , SystemVerilog PLI coding, Verilog simulations, AI-assisted tools, Timing Analysis, UVM Test Bench
